Current Sense Sets GaN Switching Speed

In a 48 V GaN joint drive, the limit on edge rate is usually the phase current measurement, not the transistor. GaN will hand you 50 V/ns and more ^[1]. Whether you can use it depends on whether the sensing chain sitting a few millimetres away survives that transient with its answer intact. Get the sensor wrong and you end up slowing your edges to protect a measurement, which throws away the reason you bought GaN.

The specification a joint drive actually needs

Before choosing a topology it is worth writing down the full requirement set, because current sensing in a robot joint is over constrained in a way that single specification comparisons hide. TI's target list for a sub 60 V servo drive ^[2]:

Plus immunity to conducted RF and fast transient bursts, immunity to stray magnetic fields, and a small, low profile PCB footprint ^[2]. On a ring PCB of 5 cm to 10 cm ^[3] that last item is not a soft requirement. Any one is easy. All of them together is the design problem.

Downgrading the isolation is what buys the area

The interesting architectural decision is not adding isolation. It is deliberately choosing less of it.

Reinforced isolation exists to protect humans from a hazardous rail. For 12 V to 60 V fed inverters, TI's own design guide notes that non isolated current sense amplifiers are attractive on system cost ^[4], so isolation at these voltages is there to break a ground domain and keep power ground noise out of the measurement, not to satisfy a safety clause. That decoupling of purpose from safety is what permits functional isolation instead, and the footprint follows: roughly 1 mm of creepage and clearance instead of more than 8 mm of clearance, in a 2.7 mm by 3.5 mm leadless package, with a working voltage of 200 Vrms or 280 VDC and 570 Vrms transient capability ^[2]. The result occupies about half the board area of the reinforced equivalent ^[1][2].

Be deliberate about it. The justification is the bus voltage, not a standards exemption you can point to. In a machine a person touches, that is a decision to make consciously and document, not one to inherit from a reference design.

What oversampling actually costs

The sensing element is a second order delta sigma modulator handing a one bit stream across the barrier on two wires, with decimation in the MCU ^[2]. So resolution and latency are a firmware choice made after the hardware is built. That flexibility is the real advantage, and it comes with an explicit exchange rate.

Measured on a 48 V GaN inverter with a 1 mΩ shunt at 3 A, with a 20 MHz modulator clock and a sinc cubed filter ^[2]:

Read the shape, not the endpoints. OSR 32 to 128 buys 2.4 bits. OSR 128 to 256 buys 0.5 bits and doubles the latency. In a torque loop at 8 kHz to 32 kHz ^[3], where the whole control period is 125 µs down to 31.25 µs, latency is not free and the knee sits around OSR 128.

One result that should change how you think about noise floors: at OSR 32 the ENOB is essentially flat from minus 3 A to plus 6 A, and at OSR 128 the 6 A point gives up only 0.2 bits against the smaller currents ^[2]. Resolution does not collapse at low current, which matters because delicate manipulation is exactly the regime where phase currents are small and 8 to 11 bit analog chains run out of resolution ^[1].

Two filters, one bit stream

The most reusable idea here: run the same modulator output through a second, short decimation filter. A sinc cubed filter at OSR 8 on the 20 MHz clock settles in about 1.2 µs ^[2], satisfying the under 2 µs short circuit requirement from the same hardware, with no comparator, no extra sensor and no second analog path.

You get a slow accurate path for the control loop and a fast coarse path for protection, from one device and two wires. Where a faster trip is needed, a dedicated functionally isolated comparator responds in around 290 ns and can shut the gate drivers down directly ^[1], keeping protection deliberately faster than measurement.

The transient results worth internalising

Two measurements from the same board matter more than the headline resolution.

First, the edges are asymmetric. The hard switched rising edge measured 13 V/ns while the soft switched falling edge measured 2.7 V/ns, on a switch node swinging between 0 V and 48 V ^[2]. Your common mode transient stress is roughly five times worse on one edge than the other, and the sensing chain has to survive the worse one. Devices in this class specify 150 V/ns of common mode transient immunity against GaN edges of 50 V/ns or more, which is the margin that lets you keep the fast edge ^[1].

Second, and less expected: with the bootstrap capacitor deliberately shrunk so that the modulator supply swung from 3 V to 4.5 V, a full 1.5 V of ripple, the measured phase current was identical to the current probe ^[2]. The implication for design is specific. Size the bootstrap capacitor from the gate driver undervoltage lockout threshold, not from the modulator's supply rejection.

One caveat that quietly moves the specification from the device to your board: TI recommends matching the optional common mode capacitors on the modulator inputs to better than 5 percent for best performance ^[2]. Common mode transient rejection at 13 V/ns is a layout and matching property as much as a silicon property. We learned that one on hardware.

References

1. Texas Instruments, How Advanced Current and Voltage Sensing Enable Ultra-Precise Robotics, SSZTD76, March 2025.
2. Texas Instruments, High Resolution, Small Form Factor Phase Current Sense for 48V Robotics and Servo Drives, SBAA666, February 2025.
3. Texas Instruments, Application of GaN FET in Humanoid Robots, SNOAAB3, January 2025.
4. Texas Instruments, An Engineer's Guide to Industrial Robot Designs, SSIY006, 2Q 2020, section 2.2.11.